Silicon epitaxial wafer and production method therefor

ABSTRACT

A surface roughness distribution in the surface of a silicon epitaxial wafer is made uniform by optimizing a temperature distribution in the surface of a susceptor used in a vapor phase thin film growth apparatus. The susceptor is not supported by its center of the rear surface thereof, but only the peripheral portion thereof is supported using vertical pins respectively provided at the far ends of spokes radially branched from a rotary shaft. The susceptor is constituted so that a difference in temperature between the maximum and minimum in the surface of a silicon wafer is suppressed to a value equal to or less than 7° C. Hence, a surface roughness distribution in the surface of the silicon epitaxial wafer can be suppressed to a value equal to or less than 0.02 ppm.

RELATED APPLICATION

[0001] This application claims the priority of Japanese PatentApplication No. 10-228665 filed on Jul. 29, 1998, which is incorporatedherein by reference.

BACKGROUND OF THE INVENTION Field of the Invention

[0002] This invention relates to a silicon epitaxial wafer and aproduction method therefor and particularly, to high precision controlof surface roughness of a silicon epitaxial layer through realization ofuniform temperature distribution in a surface of a silicon wafer.

Description of the Prior Art

[0003] A design rule of a semiconductor device has already been reachedto a subquarter micron level in a practical aspect. As an electriccharge handled in a semiconductor device is decreased with progress inminiaturization, even a small number of minute defects in the vicinityof a surface of a silicon single crystal substrate have a possibility ofgiving a fatal influence on device characteristics larger than in thepast: deterioration in performances of a bipolar circuit and a CMOScircuit has especially been problematic.

[0004] Therefore, it is expected that, hereinafter, a silicon epitaxialwafer produced by growing a silicon epitaxial layer on a silicon singlecrystal substrate in a vapor phase will increasingly be used instead ofthe silicon single crystal substrate, which is produced in a process inwhich a silicon single crystal ingot pulled from a melt is sliced and aslice is mirror-polished. In the following description, a silicon singlecrystal substrate and a silicon epitaxial wafer are generically calledas a silicon wafer.

[0005] High level uniformity of thickness distribution is required for asilicon epitaxial wafer. The thickness distribution uniformity mayalternatively be expressed by a flatness of a silicon epitaxial layerwhich is grown on a silicon single crystal substrate since the siliconsingle crystal substrate is originally high in flatness. The reason whythe high level flatness is required is that a wavelength of exposurelight which has been used in photolithography in recent years is shorterdown to the far-ultra violet region and a depth of focus has greatlybeen reduced, so that there arises a necessity to earn any amount of aprocess margin. Such a requirement for high level flatness isstrengthened more and more as a diameter of a silicon wafer is increasedfrom a current 200 mm to 300 mm or more.

[0006] A structure of a single wafer type vapor phase thin film growthapparatus 20 is shown as an example in FIG. 8. In the apparatus, asilicon wafer W is singly disposed in a process vessel 21 made oftransparent quartz and vapor phase growth of a thin film is performedwhile the silicon wafer W is heated from above and under by radiation ofinfrared lamps 29 a, 29 b. The infrared lamps 29 a are an outside groupand the infrared lamps 29 b are an inside group.

[0007] The interior of the process vessel 21 is partitioned into anupper space 21 a and a lower space 21 b by a susceptor 25 on which asilicon wafer is disposed. A raw material gas which is introducedtogether with H₂ gas, a carrier gas, through a gas supply port 22 intothe upper space 21 a flows in a direction of an arrow A in the figurewhile forming a near laminar flow along a surface of the silicon wafer Wand then discharged from an exhaust port on the other side. A purge gaswhich is H₂ gas under higher pressure than that of the raw material gasis supplied into the lower space 21 b. The reason why the purge gas isunder the higher pressure is to prevent the raw material gas fromflowing into the lower space 21 b through a gap between the processvessel 21 and the susceptor 25.

[0008] The lower space 21 b contains support means made of quartz forsupporting the susceptor 25 by the rear surface and lift pins 28 forloading and unloading of a silicon wafer W on the susceptor 25.

[0009] The support means is constructed from a rotary shaft 26 and aplurality of spokes 27 which radially branch away from the rotary shaft26. Vertical pins 27 b, 27 c are provided to the far end of each spoke27 and the top end of the rotary shaft 26 and the fore ends of thevertical pins 27 b, 27 c are respectively engaged in recesses 25 c, 25 dformed in the rear surface of the susceptor 25 for supporting thesusceptor 25. The rotary shaft 26 is rotatable by drive means, notshown, in a direction of an arrow C in the figure.

[0010] The head of each of the lift pins 28 is enlarged in diameter andis rested while hanging on a tapered side wall of a through-hole 25 bformed in the bottom surface of a pocket 25 a of the susceptor 25 fordisposing a silicon wafer W therein. The shaft portion of each lift pin28 is inserted through a through-hole 27 a which is formed by boring themiddle portion between both ends of a spoke 27 and each lift pin 28 isdesigned to be vertically hung down in a stable manner.

[0011] A silicon wafer W is loaded on and unloaded from the susceptor 25by vertical movement of the support means. For example, when the siliconwafer W is unloaded from the susceptor 25, the support means is moveddownward and the tail ends of the lift pins 28 are directly put intocontact with the inner surface of the lower space 21 b of the processvessel 21 as shown in FIG. 9. With such encouraged conditions, the liftpins 28 push up the rear surface of the silicon wafer W with the heads,thereby floating the silicon wafer W upward from the pocket 25 a.Thereafter, a handler, not shown, is inserted in a space between thesusceptor 25 and the silicon wafer W and the silicon wafer W is handedover or received and further transported.

[0012] A susceptor 25 is usually made from graphite base material coatedwith a thin film of SiC (silicon carbide) . The reason why graphite ischosen as base material is that though it is related with the fact thatheating for vapor phase thin film growth apparatuses in the early stagein development was mainly conducted by high frequency induction heating,in addition graphite has merits such as a high purity product being easyto be obtained, being easy to be machined, a thermal conductivity beingexcellent, being hard to be broken and the like. However, graphite is aporous material mass and therefore has problems such as there being apossibility to release occluded gas during process, the surface of asusceptor being changed into SiC through a reaction between graphite anda raw material gas in the course of vapor phase thin film growth and thelike. From such reasons, it is generalized that the surface of graphiteis covered by a SiC film before use. A SiC thin film is usually formedby CVD (a chemical vapor deposition method).

[0013] A material of the lift pins 28 is also graphite as base materialcoated with SiC as in the case of the susceptor 25.

[0014] While a requirement for a flatness of a silicon epitaxial waferhas increasingly been severer every year, there has been found that evenwith a single wafer vapor phase thin film growth apparatus having astructure mentioned above, whose structural materials are improved,differences in thickness between positions in the surface of anepitaxial layer are not avoided according to a specific area in thesurface. Especially when a thickness of a silicon epitaxial layerexceeds about 8 μm, there is a trend that differences in thicknessbetween positions in the surface of a silicon epitaxial layer areincreased to a level which is unfavorable for practical use.

[0015] A film thickness distribution of a silicon epitaxial layerobserved by the inventors is shown in FIGS. 10A to 10C, wherein thesilicon epitaxial layer with p type conductivity and a resistivity of 10Ω·cm was grown on a p⁺type silicon single crystal substrate with adiameter of 200 mm, a main surface of a (100) plane and a resistivity of0.01 Ω·cm to 0.02 Ω·cm to a target thickness 15 μm. FIG. 10A shows ameasurement direction for a thickness distribution; a direction whichfaces to a notch N which show a crystallographic orientation is called avertical direction and a direction which intersects perpendicularly tothe vertical direction is called a lateral direction. FIG. 10B is a filmthickness distribution vs. a distance in the lateral direction from thecenter of a silicon epitaxial wafer EW. FIG. 10C shows a film thicknessdistribution vs. a distance in the vertical direction from the center ofa silicon epitaxial wafer EW.

[0016] As can be clear from the figures, there is a trend that thicknessof a silicon epitaxial layer is decreased at the center.

[0017] Since flatness is extremely large to be about 0.3 μm in SFQD(SEMI M1-96) according to the definition by SEMI (SemiconductorEquipment and Materials International) thanks to the decrease inthickness, a flatness-related failure rate sometimes exceeds 4% inproduction of silicon epitaxial wafers. The SFQD according to thedefinition by SEMI is, when the entire surface of a wafer is segmentedinto cells each of 20 mm square, an absolute value of the maximumdifference in height between a reference plane which has been obtainedby the best fit method and a peak or a valley which occurs in each cell.

[0018] It was newly found by the inventors that a similar trend was alsoobserved in FIG. 11 showing a result of measurement with a laserscattered light detection apparatus of a surface roughness distributionin the surface of the silicon epitaxial layer.

[0019] A laser scattered light detection apparatus is an apparatus bywhich magnitudes of a particulate and surface roughness are detectedthrough measurement of an intensity of scattered light which is obtainedin scanning on a silicone wafer with laser light. An intensity ofscattered light is expressed in a unit of ppm. For example, 0.5 ppmshows that scattered light with an intensity of 0.5 part of incidentlight 1,000,000 parts is measured. Since an intensity of scattered lightis proportional to surface roughness, it is understood that when anintensity of scattered light is larger, convexity and concavity arerelatively larger in height and depth.

[0020] A laser scattered light detection apparatus can measure on theentire main surface of a silicon wafer, but since irregular reflectionfrom a chamfered portion at a level which cannot be neglected isconcurrently measured in the peripheral area of the silicon wafer,measurement values which are obtained in the peripheral area of aboutseveral mm in width are usually excluded.

[0021] In FIG. 11, the surface of a silicon epitaxial wafer EW can becategorized into 4 regions A to D according to magnitudes of surfaceroughness in a broad sense. The A region occupies three arc-like partsin the peripheral portion of the wafer and the arc-like parts are almostequal in shape and area; and the B region comprises insular partslocated inside disconnections of the A region as centers, wherein theregions A and B have scattered light intensities as large as 0.345 ppmto 0.365 ppm, and it is understood therefore that there occursrelatively large surface roughness in the regions. On the other hand,the C region occurs in a circular shape in the central portion of thewafer; and the D region occurs in dots in the vicinity of thedisconnections of the A region, wherein the regions C and D havescattered light intensities as small as 0.330 ppm to 0.335 ppm, and itis understood that there occurs relatively small surface roughness inthe regions.

[0022] Values of surface roughness in the surface of a silicon epitaxialwafer EW are understood to have a dispersion of 0.035 ppm in terms of ascattered light intensity from a difference between the maximum (0.365ppm) and the minimum (0.330 ppm) in scattered light intensity.

[0023] As mentioned above, in FIG. 11, as well, which shows adistribution of surface roughness of a silicon epitaxial wafer EW, thereis observed a trend in which surface roughness is smaller in the centerof the silicon epitaxial wafer as in the case of FIGS. 10 B, C.

[0024] However, a change in film thickness cannot directly be estimatedfrom surface roughness. The reason why is that surface roughness ismainly dependent on a temperature distribution in the surface of asilicon wafer, whereas a change in film thickness is affected by notonly a temperature distribution in the surface of a silicon wafer, but asupply distribution of a raw material gas on the surface.

[0025] In any case, when application of a design rule equal to or lessthan 0.13 μm to a semiconductor process in the future is imagined, theabove mentioned thickness distribution cannot be accepted in a practicalaspect.

SUMMARY OF THE INVENTION

[0026] It is accordingly an object of the invention to provide a siliconepitaxial wafer in which not only uniformity of surface roughness of itssilicon epitaxial layer is improved but distributions of flatness andfilm thickness in its surface are also improved and a production methodfor the silicon epitaxial wafer.

[0027] A silicon epitaxial wafer of the invention has a siliconepitaxial layer whose surface roughness distribution in its surface,which is calculated based on all measurements of surface roughness by alaser scattered light detection method excluding measured values whichare respectively included within a cumulative frequency of 0.3% in theupper and lower end sides of all the measurements, is suppressed to beequal to or less than 0.02 ppm.

[0028] Exclusion of measurements which are respectively included withina cumulative frequency of 0.3% in the upper and lower end sides isequivalent almost to exclusion of measurements which fall outside therange of x±3σ of all the measurements (x is the average of all themeasurements and σ is a standard deviation).

[0029] The inventors have obtained findings that in production of such asilicon epitaxial wafer, a better result can be realized not only byimproving a shape of support means made of quartz to omit the verticalpin 27 c located in the central portion but by shifting a contactposition of the far end (corresponding to a vertical pin 27 b which isdescribed above) of each of support members (corresponding to the spokes27 which are also above described) with the rear surface of a susceptorfurther toward the outer periphery thereof compared with conventionaland the invention has been proposed based on the findings. At thispoint, a distance between the outer peripheral edge of the susceptor anda contact position of the far end of each support member therewith isset to a value at which a decrease in temperature of the peripheralportion of a silicon wafer from the maximum temperature in the surfaceof a silicon wafer is suppressed to be equal to or less than 7° C.

[0030] The susceptor is rotated about a rotary shaft and when heatingmeans is a plurality of infrared lamps which are arranged around acentral axis, the central axis is shifted eccentric to the rotary shaftof the susceptor, thereby making it possible for radiation heat of theheating means to reach even portions, from under, which have beenshielded by support means in the prior art. Therefore, a local decreasein temperature in the surface of the susceptor can be alleviated,thereby making it possible to prevent decrease in film thickness at aposition corresponding to the local decrease in temperature of thesilicon wafer on the susceptor.

[0031] Besides, an influence of the support members can also bealleviated by increasing a distance between the rear surface of thesusceptor and the support members compared with the prior art. Thedistance is set to a value at which a difference in temperature betweenthe maximum and minimum in the surface of the silicon wafer can besuppressed to be equal to or less than 7° C.

[0032] As can be clear from the above description, since, in a vaporphase thin film growth apparatus of the invention, improvement on ashape and size of support means is made and a change in relativeposition of the susceptor to the heating means according to a necessityis effected, a temperature distribution of a susceptor heated byradiation from heating means is optimized, so that not only isuniformity of surface roughness of a silicon epitaxial layer on asilicon wafer disposed on the susceptor improved, but flatness and filmthickness distributions in the surface are also improved.

[0033] The invention relates to a technique to better a practicalperformance of a single wafer type vapor phase thin film growthapparatus which is expected to be main stream of its kind in companywith a change toward a silicon wafer with a larger diameter andespecially, the technique is effective for production of a high qualitysilicon epitaxial wafer and an industrial value thereof is extremelyhighly recognized in the semiconductor production field.

BRIEF DESCRIPTION OF THE DRAWINGS

[0034]FIG. 1 is a graph showing a relation between surface roughness ofa silicon epitaxial layer of a silicon epitaxial wafer and vapor phasegrowth temperature.

[0035]FIG. 2 is a chart showing surface roughness distribution in asilicon epitaxial layer of a silicon epitaxial wafer of the invention.

[0036]FIGS. 3A, B and C are an illustration and graphs showing a filmthickness distribution of a silicon epitaxial layer of a siliconepitaxial wafer of the invention, FIG. 3A shows a plan view of the waferfor illustrating measurement directions, FIG. 3B shows a film thicknessdistribution along a lateral diameter of the wafer and FIG. 3C shows afilm thickness distribution along a vertical diameter of the wafer.

[0037]FIG. 4 is a schematic sectional view showing a structure, as anexample, of a vapor phase thin film growth apparatus which can be usedin the invention.

[0038]FIG. 5 is a schematic, enlarged, sectional view showing a part ofthe vapor phase thin film growth apparatus of FIG. 4.

[0039]FIG. 6 is a plan view as seen from the rear surface of a susceptorof the vapor phase thin film growth apparatus of FIG. 4.

[0040]FIG. 7 is a schematic sectional view showing an example with anincreased distance between the susceptor and spokes of the vapor phasethin film growth apparatus of FIG. 4.

[0041]FIG. 8 is a schematic sectional view showing a structure, as atypical example, of a conventional vapor phase thin film growthapparatus during use in vapor phase growth.

[0042]FIG. 9 is a schematic sectional view showing a structure, as atypical example, of a conventional vapor phase thin film growthapparatus when a silicon wafer is moved upward from a susceptor usinglift pins.

[0043]FIGS. 10A, B and C are an illustration and graphs showing a filmthickness distribution of a silicon epitaxial layer of a conventionalsilicon epitaxial wafer of the invention, FIG. 10A shows a plan view ofthe wafer for illustrating measurement directions, FIG. 10B shows a filmthickness distribution along a lateral diameter of the wafer and FIG.10C shows a film thickness distribution along a vertical diameter of thewafer.

[0044]FIG. 11 is a chart showing a surface roughness distribution of asilicon epitaxial layer of a conventional silicon epitaxial wafer.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0045] The invention has been proposed paying attention to the factsthat a surface roughness distribution in the surface of a siliconepitaxial layer which is measured using a laser scattered lightdetection apparatus has a similar trend to a film thickness distributionof a silicon epitaxial layer which is affected by non-uniformity oftemperature distribution.

[0046] Surface roughness has a correlation with growth temperature and,as shown in FIG. 1, while surface roughness is decreased when growthtemperature is lower, surface roughness is increased as growthtemperature is raised. That surface roughness is changed by 0.02 ppm inthe vicinity of 1130° C. which is commonly used as silicon epitaxialgrowth temperature means that there is a difference of 7° C. in growthtemperature locally. In a diffusion controlled (controlled by feed rate)temperature region at a temperature equal to 1050° C. or higher in whicha normal silicon epitaxial growth is effected, when a difference ingrowth temperature is equal to or less than 7° C., growth temperature isnot substantially changed and uniform growth speed can even locally berealized.

[0047] Returning to FIG. 11 which has been described above while keepingin mind that no change in local growth speed is achieved in a differencein growth temperature equal to or less than 7° C., the central region Cand the region D comprising three locations in the peripheral portionare found to be areas in which temperatures are relatively low. Theregions C and D respectively correspond to contact positions of thevertical pin 27 c and lift pins 28.

[0048] While the region C corresponds to a position at which thevertical pin 27 c is put in contact with the susceptor from under, sinceheat of the infrared lamps 29 b is hard to reach by spatial shieldingcaused by the rotary shaft 26, it is believed that decrease intemperature occurs for this reason.

[0049] While the region D corresponds to positions at which the liftpins 28 are put in contact with the wafer from under, since a thermalconductivity of a graphite base material which is a structural materialof the lift pins 28 is very high, heat dissipation through the lift pins28 as thermal conduction routes is effected, which, it is believed,causes decrease in temperature.

[0050] The insular region B is areas with a little higher temperaturethan the peripheral area of each and corresponds to positions in whichthe spokes 27 extending in three direction from the central shaft 26 arearranged. It is believed that since quartz which is a structuralmaterial of the spokes 27 exerts large heat accumulating effect due toits low thermal conductivity, temperature of areas in the vicinity areraised when they are heated.

[0051] The invention is to realize a uniform temperature distribution inthe surface of a silicon wafer by contriving a shape of support meanswhich has a possibility to affect a temperature distribution in thesurface of the silicon wafer.

[0052] As one of the contrivances, while a distance between the outerperipheral edge of a susceptor and a position at which the far end ofeach of the support members is put in contact with the susceptor isdecreased compared with the prior art, that is the position at which thefar end of each support member is put in contact with the susceptor ismoved away from the periphery of a silicon wafer, the optimal value ofthe distance cannot dimensionally be determined as a definite value,since the optimal value of the distance is varied according to adiameter, thickness and thermal conductivity of a susceptor, an outputof heating means, a shape and size of the far end of each support memberand the like. In the invention, that the distance is determined in termsof temperature in such a manner that “decrease in temperature of thewafer peripheral portion from the maximum temperature in the siliconwafer which is disposed on a susceptor is suppressed to be equal to orlower than 7° C.” for the purpose to generalize the definition of thedistance.

Example 1

[0053] A silicon epitaxial wafer of the invention will be described withreference to FIG. 2 in the example. Pitches of hatching expressingsurface roughness of FIG. 2 is smaller than those in the case of FIG. 11which has been described and magnitudes of surface roughness expressedby hatching with different pitches are different from one another,though there is no difference in that both are expressed by hatching.

[0054] The silicon epitaxial wafer EW is obtained by growing a p-typesilicon epitaxial layer (a resistivity=10 Ω·cm) to a target thickness 15μm on a p⁺type silicon single crystal silicon wafer with a diameter of200 mm and a main surface of a (100) plane.

[0055] While in FIG. 2 showing the invention, there can be observed theregions A to C which is similar to FIG. 11 showing a conventionalexample, how the regions appear on a wafer is considerably differentfrom each other. First, the region A which is surface roughnessincreased areas which appear at three sites of the peripheral portion ofthe silicon epitaxial wafer EW of FIG. 2 is considerably contractedcompared with FIG. 11 showing a conventional example. The region B whichis also surface roughness increased areas appearing in insular shapes isnot isolated and more uniformly distributed in the surface of thesilicon wafer. Further, the region C, which is in the central area, isnot a clear-cut circular surface roughness decreased area as shown inFIG. 11 but a surface roughness increased area in the sense ofambiguity. The dot like region D which is observed in FIG. 11 does notappear in FIG. 1.

[0056] In the invention, a surface roughness distribution in a surfaceis calculated based on all measurements of surface roughness in thesurface by a laser scattered light detection method excludingmeasurements of surface roughness in the surface by the laser scatteredlight detection method which are respectively included within acumulative frequency of 0.3% in the upper and lower ends of all themeasurements. In the case of the silicon epitaxial wafer EW shown inFIG. 1, the measurements included within the cumulative frequency of0.3% in the upper and lower ends are regions equal to or less thansurface roughness of 0.334 ppm (a frequency 0.08%) and equal to or morethan surface roughness of 0.352 ppm (a frequency 0.15%) . Accordingly,the maximum of surface roughness in the surface of the silicon epitaxialwafer is 0.352 ppm and the minimum is 0.334 ppm and a surface roughnessdistribution in the surface spans 0.018 ppm from 0.352 ppm to 0.334. Thevalue is within a value of 0.02 ppm defined by the invention and thesilicon epitaxial wafer was confirmed to have a very uniform surfaceroughness distribution in the surface.

[0057] A film thickness distribution of a silicon epitaxial wafer EW ofthe invention is further shown in FIGS. 3A to C. FIG. 3A showsmeasurement directions for a film thickness distribution and a directionfacing to the notch N indicating a crystallographic orientation is avertical direction, while a direction intersecting the verticaldirection at a right angle is a lateral direction. FIG. 3B shows a filmthickness distribution vs. a distance from the center of the siliconepitaxial wafer EW along the lateral direction, while FIG. 3C shows afilm thickness distribution vs. a distance from the center of thesilicon epitaxial wafer EW along the vertical direction.

[0058] As is clear from these figures, there appear almost no decreasesin thickness of the silicon epitaxial wafer in the center of the wafer.Further, the SFQD of the definition according to SEMI are 0.01 μm at thewafer center and the maximum value is 0.17 μm across the entire wafer,which are improved by a great margin compared with conventional.

[0059] In production of a silicon epitaxial wafer, a flatness relatedfailure rate in terms of SFQD can be improved to a value equal to orless than 0.7% by suppressing a surface roughness distribution in thesurface of a silicon epitaxial layer within a value equal to or lessthan 0.02 ppm defined in the invention.

[0060] That is, a silicon epitaxial wafer in which surface roughness ofthe silicon epitaxial layer is suppressed to a value equal to or lessthan 0.02 ppm defined in the invention does not raise any change in filmthickness and any change in flatness locally which are caused by a localchange in temperature.

Example 2

[0061] A structure as an example of a single wafer type vapor phase thinfilm growth apparatus 10 which was used in production of the siliconepitaxial wafer which is shown in Example 1 will be described withreference to FIGS. 4 to 6. FIG. 4 is a schematic sectional view showinga structure as an example of a vapor phase thin film growth apparatus,FIG. 5 is a schematic, enlarged, sectional view showing a part of thevapor phase thin film growth apparatus of FIG. 4 and FIG. 6 is a planview as seen from the rear surface of a susceptor thereof.

[0062] In the apparatus, a silicon wafer W is set one at a time in aprocess vessel 1 made of transparent quartz and the silicon wafer W isheated using infrared lamps 9 a, 9 b from above and under and vaporphase epitaxial growth is conducted while the heating.

[0063] The interior of the process vessel 1 is partitioned into an upperspace 1 a and a lower space 1 b by a susceptor 5 on which the wafer W isdisposed.

[0064] The susceptor 5 is a disk having a diameter of 250 mm and athickness of 4 mm, made of a graphite base material coated with SiC byCVD coating and a pocket 5 a for placement of the silicon wafer thereinis formed on the upper surface thereof. A size of the pocket 5 a is, forexample, when an 8 inch wafer (a diameter 200 mm) is placed, a diameterof 205 mm and a depth of 1 mm.

[0065] Further, a recess 5 c having a diameter of 4 mm and a depth of 2mm and a recess 5 d having a diameter of 10 mm and a depth of 2 mm arerespectively formed, as shown in FIG. 6, in the peripheral portion ofthe rear surface of the susceptor 5 at positions at each of which thehead of a vertical pin 7 b provided at the far end of a support member,that is the far end of a spoke 7, described later, is put in contactwith the susceptor 5. In this case, since there are three spokes 7, therecesses 5 c, 5 d are respectively arranged at equal angular intervalsof 120 degrees about the center. At this point, it is considered thatthe centers of the recesses 5 c, 5 d and the centers of the verticalpins 7 b respectively coincide with each other and a distance from theouter peripheral edge of the susceptor 5 to the centers of the recesses5 c, 5 d is defined as an outer peripheral edge to vertical pin distanced1. In this case, d1=5 mm as an example. The vertical pin positions areshifted further to the outside each by 6 mm compared with conventional.

[0066] In the mean time, in a conventional apparatus as shown in FIG. 8which is described above, a vertical pin 27 c is provided on theprolongation of a rotary shaft 26 and positional matching between asusceptor 25 and support members has been performed using a recess 25 don the rear surface of the susceptor at the central portion thereof forreceiving the vertical pin 27 c.

[0067] However, since such positional matching cannot be adopted in theinvention in which the vertical pin in the central portion is omitted,one of the recesses in the peripheral portion is used for the positionalmatching instead. The reason why a recess 5 c is smaller than the othertwo in diameter is for use in the positional matching. That is, therecess 5 c having a diameter in which the vertical pin 7 b can beaccommodated without any gap is used for positional matching and theother two recesses 5 b have some margins.

[0068] In the upper space 1 a of the process vessel 1, a raw materialgas introduced through a gas supply port 2 together with a carrier gasH₂ flow along the surface of a silicon wafer W in a direction of anarrow A in the figure while forming almost a laminar flow and dischargedfrom an exhaust port 4 on the other side.

[0069] Purge gas, H₂ gas as purge gas under higher pressure than that ofthe above mentioned raw material gas is supplied to the lower space 1 b.The reason why the purge gas is under high pressure is that the rawmaterial gas is prevented from intruding into the lower space 1 bthrough a gap between the process vessel 1 and the susceptor 5.

[0070] Support means made of quartz for supporting the susceptor 5 bythe rear surface thereof and lift pins 8 for loading and unloading ofthe silicon wafer W on the susceptor 5 are included in the lower space 1b.

[0071] The support means is constructed from a rotary shaft 6 and, forexample, three spokes 7 branched at and extending radially from therotary shaft 6. Vertical pins 7 b are provided at the respective farends of spokes 7 and the fore ends of the vertical pins 7 b are insertedin an engaged manner in the recesses 5 c, 5 d formed on the rear surfaceof the susceptor 5 for supporting the susceptor 5. In an apparatus ofthe invention, there is no member corresponding to a vertical pin beingput in contact with the rear surface of the susceptor 5 at the centerthereof on the prolongation of the rotary shaft, as in a conventionalapparatus. A distance between the rear surface of the susceptor 5 andthe spokes 7 is defined as a susceptor spoke distance d2. In this case,it was set that d2=15 mm.

[0072] The rotary shaft 6 is rotatable in a direction of an arrow C bydrive means, not shown, in the figure.

[0073] The head of each of the lift pins 8 is enlarged in diameter andis rested while hanging on a tapered side wall of a through-hole 5 bformed in the bottom surface of a pocket 5 a of the susceptor 5 fordisposing a silicon wafer W. The shaft portion of each lift pin 8 isinserted through a through-hole 7 a which is formed by boring the middleportion between both ends of a spoke 7 and each lift pin 8 is designedto be vertically hung down in a stable manner.

[0074] As a material making the lift pins 8 in the example, a SiC basematerial coated with SiC is employed. The SiC base material is low inthermal conductivity compared with a conventional graphite basematerial.

[0075] A silicon wafer W is loaded on and unloaded from the susceptor 5by vertical movement of the support means. For example, when the siliconwafer W is unloaded from the susceptor 5, the support means is moveddownward and the tail ends of the lift pins 8 are directly put intocontact with the inner surface of the lower space 1 b of the processvessel 1. With such encouraged conditions, the lift pins 8 push up therear surface of the silicon wafer W with the heads, thereby floating thesilicon wafer W upward from the pocket 5 a. Thereafter, a handler, notshown, is inserted into a space between the susceptor 5 and the siliconwafer W and the silicon wafer W is handed over or received and furthertransported.

[0076] The plurality of infrared lamps 9 a, 9 b are arranged in twoconcentric circles. The infrared lamps 9 a constitute one outside groupof infrared lamps and the infrared lamps 9 b constitute the other insidegroup of infrared lamps and spatial, central axes of the groups arealigned with the rotary shaft 6 of the susceptor 5. Currents suppliedfor the two groups of infrared lamps 9 a, 9 b can independently becontrolled in amount and heat supplied from the groups can accordinglybe controlled in an independent manner from each other.

[0077] Actual vapor phase growth of a silicon epitaxial layer wasperformed using the above mentioned vapor phase thin film growthapparatus.

[0078] A p⁺silicon single crystal substrate with a diameter of 200 mmand a main surface of a (100) plane was used and a p type siliconepitaxial layer of a resistivity of 10 Ω·cm was grown on the substrateto a target thickness of 15 μm.

[0079] Epitaxial growth conditions were as follows as an example:

[0080] H₂ annealing: 1130° C. and 45 seconds

[0081] Epitaxial growth temperature: 1130° C.

[0082] H₂ flow rate: 40 l/min

[0083] Raw material gas (SiHCl₃ is diluted with H₂) flow rate: 12 l/min

[0084] Dopant (B₂H₆ is diluted with H₂) flow rate: 100 ml/min

[0085] A temperature distribution of the silicon single crystalsubstrate is optimized so that a surface roughness distribution in thesurface of a silicon epitaxial layer is suppressed to a value equal toor less than 0.02 ppm adopting the above described conditions in growthof the silicon epitaxial layer. Further, a supply rate of the rawmaterial gas is controlled to adjust a film thickness distribution inthe surface of the wafer.

[0086] The silicon epitaxial wafer which is described in Example 1 wasobtained in such a way. A surface roughness distribution of the siliconepitaxial wafer EW is 0.018 ppm and it is understood from the magnitudeof a surface roughness distribution thus obtained that the contrivanceof structure of an apparatus for suppressing a difference in temperaturebetween the maximum and the minimum in the surface of the silicon waferto a value equal to or less than 7° C. is effective.

[0087] That decrease in surface roughness, that is decrease intemperature, in the region C of the wafer central area, is resulted froma technique in which a vertical pin which is put into contact with therear surface of the susceptor at the center thereof is omitted andfurther an output of the inside infrared lamps 9 b is set to be largecompared with that of the outside infrared lamps 9 a. The reason why theregion A is relatively contracted is that a contact position with thesusceptor 5 of a vertical pin 7 b at the far end of each of the spokes 7is moved to the outside compared with the prior art. Further the reasonwhy the region B comes to be unclear is that a susceptor spoke distanced2 is enlarged compared with conventional.

[0088] The reason why the region D disappears is that as a material of alift pin 8, a SiC base material with a low thermal conductivity comparedwith a graphite base material used conventionally is adopted.

[0089] In the mean time, it is effective that, in the apparatus, asusceptor spoke distance d2 is larger and that the central axis of theinfrared lamp assembly is eccentrically shifted from the rotary shaft 6of the susceptor. An example in structure of such a vapor phase thinfilm growth apparatus is shown in FIG. 7.

[0090] A fundamental structure of the vapor phase thin film growthapparatus 11 shown in the figure is almost the same as that of the vaporphase thin film growth apparatus 10 of FIG. 4 which is described abovebut a susceptor spoke distance d2 is set to be larger than d1.

[0091] Further, the axial line X1 of the rotary shaft 6 and the centralaxis X2 of the assembly of the infrared lamps 9 a, 9 b are not alignedwith each other.

[0092] With such a structure, a surface roughness distribution in thesurface of a silicon epitaxial wafer can be more uniform.

[0093] According to a production method of the invention, since vaporphase growth can be effected in the range of a temperature difference atwhich a practically uniform growth speed is secured even locally, asilicon epitaxial wafer with neither a local change in film thicknessnor a local change in flatness caused by a local change in temperaturecan be produced.

[0094] In other words, since a film thickness dispersion in the surfaceof a wafer which arises according to a production method of theinvention is substantially caused only by a supply distribution on thesurface of a raw material gas, a silicon epitaxial wafer with more ofuniformity in film thickness can be produced by properly controlling asupply rate of the raw material gas after a temperature distribution ofa silicon wafer is optimally adjusted so that a surface roughnessdistribution in the surface of the silicon epitaxial layer is suppressedto be equal to or less than 0.02 ppm.

[0095] For example, a film thickness distribution which had beenamounted to about 0.4 μm in the surface of a wafer in FIG. 10, describedabove, showing a conventional silicon epitaxial wafer EW was improved toabout 0.2 μm, a half of the prior art, as shown in FIG. 3 according to aproduction method of the invention.

[0096] While embodiments of the invention are described above, theinvention is not limited to the descriptions in the embodiments. Forexample, shapes of support means and lift means, the number of spokesbranched at the top end of a rotary shaft, a diameter of a silicon waferin use, conditions for silicon epitaxial growth, details of thestructure of a vapor phase thin film growth apparatus and the like canbe subjected to a change, selection or combination in a proper manner.

What is claimed is:
 1. A silicon epitaxial wafer having a siliconepitaxial layer whose surface roughness distribution in its surface,which is calculated based on all measurements of surface roughness inits surface by a laser scattered light detection method excludingmeasured values which are respectively included within a cumulativefrequency of 0.3% in the upper and lower end sides of all themeasurements, is suppressed to be equal to or less than 0.02 ppm.
 2. Asilicon epitaxial wafer according to claim 1 , wherein the surfaceroughness has a distribution in a surface in almost concentric circlepatterns.
 3. A silicon epitaxial wafer according to claim 1 , wherein athickness dispersion of the silicon epitaxial layer is substantiallycaused only by a supply distribution on its surface of a raw materialgas.
 4. A production method for a silicon epitaxial wafer in which asilicon wafer is disposed on a rotary susceptor horizontally supportedin a process vessel and a silicon epitaxial layer is grown in a vaporphase on the silicon wafer while heating the silicon wafer,characterized by that a temperature distribution of the silicon wafer isoptimized so that a surface roughness distribution in a surface of thesilicon epitaxial layer, which is calculated based on all measurementsof surface roughness in the surface thereof by a laser scattered lightdetection method excluding measured values which are respectivelyincluded within a cumulative frequency of 0.3% in the upper and lowerend sides of all the measurements, is suppressed to be equal to or lessthan 0.02 ppm.
 5. A production method for a silicon epitaxial waferaccording to claim 4 , wherein support of the susceptor is effected byputting a far end of each of a plurality of support members radiallybranched from a top end of a vertical rotary shaft in contact with aperipheral portion of a rear surface of the susceptor surrounding anarea in which the silicon wafer is disposed and setting a distance froman outer periphery of the susceptor to the far end of each of theplurality of support members to a value at which decrease in temperatureof an outer peripheral portion of the silicon wafer from the maximum inthe surface of the silicon wafer disposed on the susceptor is suppressedto a value equal to or lower than 7° C.
 6. A production method for asilicon epitaxial wafer according to claim 4 , wherein a distancebetween a rear surface of the susceptor and each of the plurality ofsupport members is set to a value at which decrease in temperature of anouter peripheral portion of the silicon wafer from the maximum in thesurface of the silicon wafer disposed on the susceptor is suppressed toa value equal to or less than 7° C.
 7. A production method for a siliconepitaxial wafer according to claim 5 , wherein heating of the siliconwafer is performed using a plurality of infrared lamps arranged so thatthe plurality of infrared lamps assume respective positions around ancentral axis disposed eccentric to an axis of rotation of the susceptorin axial symmetry with respect to the central axis.
 8. A productionmethod for a silicon epitaxial wafer according to claim 6 , whereinheating of the silicon wafer is performed using a plurality of infraredlamps arranged so that the plurality of infrared lamps assume respectivepositions around an central axis disposed eccentric to an axis ofrotation of the susceptor in axial symmetry with respect to the centralaxis.
 9. A production method for a silicon epitaxial wafer according toclaim 4 , wherein a film thickness distribution in a surface of thesilicon epitaxial layer is adjusted after a temperature distribution ina surface of the silicon wafer is optimized.
 10. A production method fora silicon epitaxial wafer according to claim 4 , wherein one of aplurality of contact positions between a peripheral portion of a rearsurface of the susceptor and support members is used for positionalmatching for the susceptor.
 11. A production method for a siliconepitaxial wafer according to claim 4 , wherein vapor phase growth of asilicon epitaxial layer on the silicon wafer is effected in a singlewafer mode.